I'm deep in the middle of porting parts of the SoftFloat 2c library to SIMH so I can use them in the 3B2 math accelerator implementation, and this is the most tedious work I've done in ages. I hate it. This is Not Fun™.

@twylo I'm currently evaluating the prospect of having to go back to the ROMA and SIA cores of the Kestrel-3 and reworking them to use the Wishbone interconnect instead of the TileLink interconnect. That is a prospect I'm not looking forward to, but it might end up being necessary.

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