>got a bunch of ATF1508AS CPLD's
>looks cool, natively works in 5V and is still in production
>no FOSS synthesis/programming tools
p o r t y o s y s
Do you have any resources on reverse-engineering bitstreams or something?
Though I think bitstream is the last step, really.
Whatever proprietary toolchain you already have, it probably can be split into steps like:
1. RTL -> generic netlist
2. generic netlist -> mapped n etlist
3. mapped netlist -> placed & routed netlistplaced & routed 4. netlist -> bitstream
You typically go from top to bottom, replacing proprietary tools with open source ones one by one.
If I understand correctly, 1 should be target-independent, and yosys already does it for you.
2 maps the netlist to primitives present on your target device, so it needs to know what kinda logic cells your device has
3 - place & route needs to know the layout and interconnections on the device
4 requires reverse-engineering the bitstream.
So you could eg. add support for 2 and 3 to yosys/nextpnr and then feed the netlist it outputs to proprietary bitgen.
@Wolf480pl That makes sense, I'll take a look when I'll have some more time.
"I appreciate SDF but it's a general-purpose server and the name doesn't make it obvious that it's about art." - Eugen Rochko